Structure of two-transistor-one-capacitor (2T1C) dynamic random-access memory (DRAM) cell and electrical characteristics of MoS₂ and graphene transistors. (A) Schematic of our 2T1C DRAM cell fabrication process and optical microscope image of the fabricated device; scale bar: 100 μm. (B) Circuit diagram of 2T1C DRAM containing storage and calculation modules. (C) Transfer curve of the MoS₂ field-effect transistor (FET). (D) Transfer and (E) output curves of the graphene FET.