Program and erase operations of the flash memory with robust performance. (a)−(d) Energy band diagrams of the floating gate memory under positive and negative biases, corresponding to programming and erasing operations, respectively. (e) Endurance performance tested by a series of positive and negative pulses. The +22 V 50 ns/−24 V 50 ns pulses were used to repeatedly switch the memory between states 0 and 1. The drain current was read out at V_ds = 100 mV, V_gs = 0 V. (f) The dynamic change of the channel current for multiple cycles after operations of 20,000 cycles.